Cirrus公司的CS485xx系列(S48520, CS48540和CS48560)数字音频32位DSP,提供高性能的后处理和不同取样速率的数字音频的混合.DSP每秒可进行300,000,000次乘法和累加运算(MAC),具有业界最精确的72位累加器, 24k x 32 SRAM, 192 kHz SPDIF发送器, 1.8V内核单压和兼容5V的3.3V I/O电压.主要用在汽车音频系统,DTV,HD-DVD和蓝光DVD播放器以及PC扬声器.本文介绍了CS485xx系列主要特性, 系统框图和CDB48500-USB评估板主要特性,方框图和详细电路图.
The CS485xx DSP Family is designed to provide high-performance post-processing and mixing of digital audio. The dual clock domain provided on the PCM inputs allows for the mixing of audio streams with different sampling frequencies. The low-power standby preserves battery life for applications which are always on, but not necessarily processing audio, such as automotive audio systems.
There are three devices comprising the CS485xx family. The CS48520, CS48540 and CS48560 are differentiated by the number of inputs and outputs available. All DSPs support dual input clock domains and dual audio processing paths. All DSPs are available in a 48-pin QFP package.

CS485xx系列主要特性:
 Cost-effective, High-performance 32-bit DSP
— 300,000,000 MAC/S (multiply accumulates per second)
— Dual MAC cycles per clock
— 72-bit accumulators are the most accurate in the industry
— 24k x 32 SRAM, 2k blocks - assignable to data or program
— Internal ROM contains a variety of configurable sound enhancement feature sets
— 8-channel internal DMA
— Internal watch-dog DSP lock-up prevention
 DSP Tool Set w/ Private Keys for Protecting Customer IP
 Configurable Serial Audio Inputs/Outputs
— Configurable for all input/output types
— Maximum 32-bit @ 192 kHz
— Supports 32-bit audio sample I/O between DSP chips
— TDM input modes (multiple channels on same line)
— 192 kHz SPDIF transmitter
— Multi-channel DSD direct stream digital SACD input
 Supports Two Different Input Fs Sample Rates
— Output can be master or slave
— Dual processing path capability
— Input supports dual domain slave clocking
— Hardware assist time sampling for sample rate conversion
 Integrated Clock Manager/PLL
— Can operate from external crystal, external oscillator
 Input Fs Auto Detection
 Host & Boot via Serial Interface
 Configurable GPIOs and External Interrupt Input
 1.8V Core and a 3.3V I/O that is tolerant to 5V input
 Low-power Mode
— “Energy Star® Ready” in low-power mode, 268 μW in standby
Differentiating from the legacy Cirrus multi-standard, multichannel decoders, this new CS485xx family is still based on the same high-performance 32-bit fixed point Digital Signal Processor core but instead is equipped with much less memory, tailoring it for more cost-effective applications associated with multi-channel and virtual-channel sound enhancements.

CS485xx系列目标应用:
— Digital Televisions
— Multimedia Peripherals
— iPod® Docking Stations
— Automotive Head Units
— Automotive Outboard Amplifiers
— HD-DVD & Blu-ray Disc DVD Receivers
— PC Speakers

图1.CS48500系统框图

CDB48500-USB评估板
Each CDB48500-USB kit comes with the following:
• CDB48500 Development Board (See Figure 1-2)
• Power Supply: +9V, 1.67A, 100V - 240V, with AC Power Cord
• CDB USB MASTER Digital I/O Card (See Figure 1-2)
• USB Cable
• 3 Board Overlays Identifying the Outputs for CS48520, CS48540, and CS48560
• Document Card Explaining How to Get the Latest Board Software
The CDB48500-USB is a convenient and easy-to-operate evaluation platform. It has been designed to demonstrate the majority of the CS485XX functions on a small 6" x 6.5" base board.

CDB48500-USB评估板特性:
• PC control of the CS485XX using the DSP Composer™ graphical user interface
• Serial control of audio devices on CDB48500 via I2C® or SPI™ protocols
• Digital audio input of PCM via optical or coaxial S/PDIF (does not support compressed data input)
• Up to 12-channel analog audio input via the two CS42448 audio codecs
• Up to 12-channel analog output through the two CS42448 audio codecs
• Digital audio output of PCM data via optical S/PDIF
• Headphone output jack
• Multi-channel digital audio input via the CDB USB MASTER card (not yet supported)
• Separate input and output clocking domains to allow 1FS-to-2FS audio processing on the CS485XX
• Fast boot – host-controlled master boot (HCMB) of custom applications from 4 Mbit serial SPI flash device.
• Microphone input with integrated amplifier for Intelligent Room Calibration (IRC) evaluation (future)
• Supports all members of the CS485XX family in the 48-pin LQFP package.

图2.CDB48500-USB评估板框图

图3.CDB48500-USB评估板外形图

图4.CDB48500-USB评估板连接图

图5.CDB48500-USB评估板框图

图6.CDB48500-USB评估板电路图:DSP输入数据复接电路


图7.CDB48500-USB评估板电路图:DSP电路

图8.CDB48500-USB评估板电路图:串行闪存存储器电路

图9.CDB48500-USB评估板电路图:SPDIF接收器电路

图10.CDB48500-USB评估板电路图:CODEC #1(CS42448)电路

图11.CDB48500-USB评估板电路图:CODEC #2(CS42448)电路

图12.CDB48500-USB评估板电路图:CODEC #1(CS42448)电路
图13. CODEC 1和CODEC 2输入滤波器电路图

图14.CDB48500-USB输出滤波器和耳机输出电路图

图15.CDB48500-USB评估板电路图:麦克风预放大电路

图16.CDB48500-USB评估板电路图: 控制连接和电源电路